Intel has taken a step forward in its quest to close the gap with competitors by introducing its 18A-P foundry node, a refined version of the existing 18A process. This new node is earmarked for the next-generation Xeon 'Diamond Rapids' server processor, promising a 9% performance increase at iso-power and an 18% power reduction at iso-performance. The improvements are significant, but the real question is whether this will translate into tangible benefits for end-users.
The 18A-P node introduces several enhancements over its predecessor. These include a 20-40% improvement in die-level thermal resistance and a 10-30% improvement in via resistance in performance-critical layers. Intel has also added new cell options to support a wider range of products, including W1 and W1.5 cells for low-power designs and the W3P cell for high-performance needs, which utilizes a 'dual contact' design to boost performance without exceeding the footprint of the existing W3 cell.
One of the most notable changes is the integration of a new heat-conducting material on the front side of the die. This, combined with updates to Intel's EDA tools for thermally-aware layouts, aims to better manage heat dissipation at the structural level. These improvements suggest that Intel is not just focusing on raw performance but also on efficiency and thermal management, which are crucial for server processors.
The first product to implement the 18A-P node will be the Xeon 7 'Diamond Rapids' server processor. This processor features four Compute tiles, each built on the new foundry node. Each Compute tile packs a CPU complex with 48 'Panther Cove' P-cores and localized L3 cache. The total package CPU core count is 192, with no support for Simultaneous Multithreading (SMT), making this a 192-core/192-thread processor.
The 'Diamond Rapids' processor is built on a very large substrate and introduces the new LGA9324 socket with an enormous pin-count. It also features two I/O and Memory Hub (IMH) tiles built on an older foundry node, such as Intel 3. Each IMH tile has an 8-channel DDR5 memory interface, for a total of 16 DDR5 memory channels on the package. This is also Intel's first processor to implement PCI-Express Gen 6, which doubles bidirectional bandwidth over the current PCIe Gen 5.
The Xeon 7 'Diamond Rapids' family is slated for a 2027 market debut. While the improvements in performance and efficiency are promising, it remains to be seen how this will translate into real-world benefits for end-users. The focus on thermal management and power efficiency is a positive sign, but the lack of SMT support could be a drawback for some applications.
For now, Intel's 18A-P node represents a significant leap forward in its foundry process technology. It sets the stage for the next-generation Xeon 'Diamond Rapids' processor and potentially other products down the line. However, the true test will be how these improvements translate into tangible benefits for end-users, particularly in terms of performance and efficiency.
