The M5 Pro and M5 Max represent Apple’s latest move away from monolithic chip design. By splitting the CPU/NPU die from the GPU using TSMC’s SoIC-MH 2.5D process, Apple can now independently scale both components without hitting reticle limits. This change allows for more SKUs while reducing defective dies—a practical step that could lower production costs over time.
At the heart of these chips is a new core tier called ‘M-core,’ positioned between the performance and efficiency cores found in earlier M-series SoCs. The M5 Pro features six super cores (peaking at 4.61 GHz) and twelve M-cores (running at 4.38 GHz), while the M5 Max adds more GPU cores and memory cache. This structure, combined with LPDDR5X memory running at 9,600 MT/s, supports up to 64 GB for the Pro variant and 128 GB for the Max.
Key Specifications
- CPU: 18-core (M5 Pro: 6 super cores + 12 M-cores; M5 Max: same CPU, larger GPU)
- Cache: Super core cache (16 MB), M-core cache (16 MB on Pro, 48 MB on Max), memory cache (24 MB on Pro, 48 MB on Max)
- Memory: LPDDR5X-9600 MT/s, up to 64 GB (Pro) or 128 GB (Max)
- GPU: 20-core iGPU (Pro), 40-core iGPU (Max), both at 1.62 GHz
The M-core is designed for multithreaded workloads, delivering roughly 70% of a super core’s performance with lower power consumption. This should improve efficiency in tasks like video editing or rendering without significantly impacting battery life—a key consideration for laptop users.
Market Implications
This architecture shift benefits both Apple and PC builders. For Apple, the ability to scale CPU and GPU dies independently means fewer defective products and more flexibility in creating variants. For buyers, it translates to higher memory capacity (128 GB on the Max) and potentially better performance-per-watt ratios compared to previous generations.
While the immediate impact may not be dramatic for everyday tasks, this change sets a foundation for future scaling. The move to 2.5D packaging also suggests Apple is preparing for even more complex designs in later SoCs, possibly integrating additional components like NPUs or specialized acceleration units without sacrificing yield.
